1. Field of the Invention
The present invention relates to a digital logic family and more particularly to a digital logic family formed from complementary series-connected pairs of Josephson junctions which are voltage biased to provide self-clocking as a result of the Josephson voltage to frequency relationship.
2. Description of the Prior Art
Superconducting circuit elements formed from Josephson junctions are known in the art. Examples of such circuits are disclosed in commonly owned U.S. Pat. Nos. 5,051,627, 4,672,359, and 4,922,250, as well as U.S. Pat. Nos. 4,623,804 and 4,092,553, and in the following articles: K. Likharev, et al. xe2x80x9cRSFQ logic/memory family: a new Josephson-junction technology for sub-terahertz-clock frequency digital systems,xe2x80x9d IEEE Trans. Appl. Supercon, Vol. 1, pp. 3-28, March 1991; O. Mukhanov, et al., xe2x80x9cNew elements of the RSFQ logic family,xe2x80x9d IEEE Trans. Magn., Vol. 27, pp. 2435-2438, March 1991; and S. Polonsky, et al., xe2x80x9cNew RSFQ circuits,xe2x80x9d IEEE Trans. Appl. Supercon, Vol. 3, pp. 2566-2577, March 1993.
Superconductor logic circuits are known to operate in constant current mode. In particular, a bias current is provided which maintains the operating point of the Josephson junctions in the circuit that is fixed at predetermined values for each circuit. Both AC and DC operated circuits are known. For example, U.S. Pat. No. 4,092,553 is an example of an AC operated logic circuit while Likharev, Mukhanov, and Polonsky (Ref. 1-3, respectively) describe DC operated logic circuits. Such current mode logic circuits are sourced by an individual resistor R in series with a power supply. The resistor is known to be selected to be large enough to maintain a voltage VR=IR that is sufficiently larger than the maximum voltage developed across the Josephson junctions in order to keep the current constant and provide isolation from other circuits. This results in extra power dissipation Ixc3x97VR. The current in the resistor R is equal to the current in the active circuit. As such, the power dissipated in the resistor is least five to ten times larger than the power dissipated in the switching circuit. Thus, there is a need to provide a superconducting logic circuit with reduced power dissipation. A second important need is to enable logic operation of large digital circuits at much higher clock rates, exceeding 10 GHz and approaching 100 GHz or higher. Clock rates are presently limited by clock distribution and regeneration jitter and by circuit complexity.
Briefly, the present invention relates to a superconducting self-clocked complementary logic family. In particular, the invention describes a new class of single flux quantum (SFQ) circuits and devices. The basic element of the circuit is a plurality of Josephson junctions and a control inductance coupled across a pair of voltage rails. An important aspect of the invention relates to the use of voltage biasing for the Josephson junctions, which provides several benefits. First, voltage biasing eliminates the need for large biasing resistors as used in constant current mode devices. Such biasing resistors are known to be the dominant source of power dissipation in such logic circuits. Elimination of the biasing resistors thus reduces the power dissipation to the lowest possible value of the power dissipation of the switching devices themselves. In addition, the voltage biasing takes advantage of the voltage to frequency relationship of Josephson junctions and automatically establishes a global clock at the Josephson frequency without the need for extra circuitry; thus increasing the practical clock rate. The superconducting digital logic family in accordance with the present invention includes devices which perform logic functions such as, AND, OR etc. as well as non-logic functions, such as a shift register function.